“开放灵活的平台” T2000——满足多样化测试需求的解决方案

SoC测试系统T2000产品革新是时代进步的标志。随着SoC器件的生命周期不断缩短，芯片制造商以往需要两到三年就购买新的测试设备或新一代的产品的情况已经改变，有了更具成本优势的新选择。
T2000系统能使客户用小的投资，短的时间来实现新产品的量产化，并推向市场。
T2000系统是为不断变化的市场需求推出的革新化的解决方案。

• Features
• Solution
• Scalability

SoC测试系统T2000Features

While chipmakers enhance the functionality of semiconductor devices and increase multi-functionality, they need to reduce development times. The T2000 is ideal for testing these devices.

Time to Market Reduction - Multi-Session

The T2000 makes it possible to develop device test programs efficiently with minimal investment. With the multi-site CPU architecture unique to the T2000, multiple users can log in to a single test system at the same time, and perform debugging work independently. Up to eight people can work at the same time, contributing to both engineering cost savings and TTM reduction. In addition, eight people can develop separate functions for the same device at the same time, greatly shortening development times.

Best-In-Class Parallel Test Efficiency - Multi-Site Controller

As more DUTs (Devices Under Test) are measured simultaneously, overhead tends to increase, and in general test times tend to be longer. However, the T2000 reduces test time and achieves high throughput with highly efficient multi-site test technology which completely eliminates overhead.

Test Time Reduction - Concurrent Test

The T2000 supports concurrent test functionality which can execute complicated device test in shorter times. Concurrent test can be more easily achieved than in the past, as the T2000 can seamlessly switch between sequential execution and parallel execution of multiple test items. In addition, its concurrent test functionality enables users to rapidly develop test programs with short test times.

Test Cost Reduction

With up to 8,192 digital channels, the T2000 achieves more than twice the parallelism of the previous model, reducing test cost.